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BARG Newsletter Issue 3/4, Spring/Summer 1985 p11 - 13 -- The Aargh Interface Mark II
SPECTRUM PORTS : The Aargh Interface Mark II - Peter Lovett

This circuit provides up to eight input an eight output ports from the Spectrum bus edge connector. It is named after the mouse on which it should eventually appear, which is so named because that's what people will say when they see it.

My thanks are due to David Buckley, and others, without whose help the prototype would not have worked. The full circuit diagram is shown in Figure 1.

Barg Newsletter Issue 3/4 - Page 11

How it works

The Spectrum ROM uses port addresses in which any of address lines A0-A4 are low, so we may use only the eight permutations of A5--A7 wfth A0-A4 hiqh. This will give ports with addresses 1F, 3F....FF (hex), A BASIC IN or OUT statement will cause /RD or /WR respectively to go low, and /IORQ to go low, while placing the port address on the address bus A0-A15. When the following 3 conditions are fulfilled, the 74LS138 (IC2) is enabled, selecting one of the port enable lines, and /EN is taken low.

Address lines A5 to A7 determine which port enable line, /P0 to /P7 is selected.

So when an I/O request for one of Aargh's ports is made, /EN is low and one of lines /P0-/P7 goes low. IF it's an OUT, /WR will be low and the appropriate 74LS273 (IC6) will have Its E pin taken high, latching the data byte from data lines D0 - D7 on its Q0 to Q7 pins. Similarly, for an IN, /RD and the port's address line will take the /OE pin on a 74LS373 (IC7) low, bringing in its peripheral's data for the processor to digest; this is the only occasion when Aargh decides what the Spectrum data bus will contain, therefore the only occasion when the bus buffer's /DIR pin is taken low.

The line marked /CLEAR will be low for about lmS after power is applied, then high thereafter, which ensures that output data lines start in a low state.

Construction
Parts list

  IC1     74LS20      dual 4-input NAND 
  IC2     74LS138     1 of 8 decoder 
  IC3     74LS02      quad 2-input NOR 
  IC4     74L532      quad 2-input OR 
  IC5     74LS245     octal 3-state bi-directional buffer
  IC6     74LS273     octal D-type  latch
  IC7     74LS373     octal 3-state transparent latch

  R1/R2 10k
  Cl    lOuF electr
  C2    0.luF disc
  plus one 0.luF capacitor for each i/c

  Innovonic's Spectrum edqe connector
  Innovonic's Spectongue
  0.1" matrix Veroboard
  0.1" Veropins
  Crimp terminals

  One each of IC6 and IC7 and
  a quarter of IC3 and IC4 is required for each additional port.